全耗尽SOI-MOS器件仿真技术研究

 2022-11-14 10:11

论文总字数:30880字

摘 要

SOI器件越来越被广泛认可,小尺寸效应的不断优化给人们的生活带来方便与智能化,全耗尽FD SOI MOS的优点:电隔离效果好,结电容小,工艺简单,功耗低等。用于做超薄顶层硅的FD SOI可实现FD MOSFET。FD SOI采用二维工艺技术,相比三维器件,制作简单方便, 栅长的四倍大约为顶层的硅膜厚度才能使FD SOI正常使用;当硅膜厚度为5nm时,栅长应约为其五倍。从而使器件结构由平面向立体过渡发展。

首先介绍SOI MOS管结构与工作原理,以及器件的国内外发展,对比了部分耗尽与全耗尽直接的区别,本课题以FD SOI MOS为重点研究对象,介绍了其特点:浮体效应,背栅效应等。说明了应用前景广泛,并且简单阐明了新型的SOI器件结构。

本文最大的特色就是采用silvaco软件来进行模拟仿真,研究了N型与P型在不同电压下的工作状态。在不同栅极电压下,饱和电流的不同。在0.2v下,N型的饱和电流为0.001A,P型的饱和电流为-2×10-5A。在不同的背栅电压下,N型与P型饱和电流的不同。在1v时,N型的饱和电流为-4.5A,P型的饱和电流为-5.5v。在研究过程中还存在些不足,比如对工艺性能的研究偏少,在整个过程中的研究只是利用了仿真软件精确调配器件参数,并未采用实际的器件加以测试验证。

关键词:FD SOI MOS器件;silvaco TCAD仿真;硅膜厚度;摩尔定律;MOSEFT

Research on simulation technology of fully exhausted SOI-MOS device

Abstract

SOI devices are more and more widely recognized. The continuous optimization of small size effect brings convenience and intelligence to people's life. The advantages of FD SOI MOS are: good electric isolation effect, small junction capacitance, simple process and low power consumption.FD MOSFET can be realized by FD SOI used for ultra thin top layer silicon.FD SOI adopts 2d technology, which is easier to make than 3d devices.Four times the length of the gate is about the thickness of the silicon film on the top layer for FD SOI to work properly.When the silicon film is 5nm thick, the gate should be about five times as long.So the device structure from flat to solid transition development.

Firstly, the structure and working principle of SOI MOS tube, as well as the development of devices at home and abroad are introduced, and the direct difference between partial depletion and total depletion is compared. This topic takes FD SOI MOS as the research object, and introduces its characteristics, such as floating body effect and backgate effect.The application prospect and the structure of the new SOI device are illustrated.

The biggest feature of this paper is to use silvaco software for simulation. The working states of N type and P type at different voltages, different gate voltages and different saturation currents are studied.At 0.2v, the saturation current of type N is 0.001a, and that of type P is -2× 10-5a.Under different back gate voltages, N - type and P - type saturation current are different.At 1v, the saturation current of N type is -4.5a, and that of P type is -5.5v.However, there are still some shortcomings in the research process. For example, there are few researches on the process performance. In the whole process, the research only USES the simulation software to accurately allocate the device parameters, but does not use the actual device to test and verify.

Keywords: FD SOI MOS device;Silvaco TCAD simulation;Silicon film thickness;Moore's law;MOSEFT

目 录

摘 要 I

Abstract II

第一章 概 述 1

1.1引言 1

1.2 SOI MOS管的结构 2

1.3 SOI器件分类及其主要工作模式 2

1.3.1 FD SOI结构设计 4

1.3.2 FD SOI MOS特点 4

1.3.3 FD SOI MOS优点 5

1.4 SOI MOS 发展 6

1.4.1 FD SOI MOS的发展 7

1.5 SOI新型器件 8

1.6本章小结 8

第二章 器件模型与仿真 10

2.1仿真软件的简介 10

2.2器件模型 11

2.3仿真步骤——结构定义 13

2.4仿真步骤——性能仿真 14

2.5本章小结 15

第三章 仿真结果 16

第四章 总结与展望 19

4.1总结 19

4.2展望未来(References) 19

谢 辞 22

参考文献 23

附 录 25

第一章 概 述

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